Start |  deutsch |  Contact | Internal |  KIT
Prof. Dr. Wolfgang Karl

Haid-und-Neu-Str. 7
76131 Karlsruhe

Tel.: +49 721 608-43771
Fax: +49 721 608-43962





Mario Kicherer, Wolfang Karl: Automatic task mapping and heterogeneity-aware fault tolerance: The benefits for runtime optimization and application development. In: Journal of Systems Architecture, Elsevier, ISSN 1383-7621, Nov. 2015.

Oliver Mattes, Wolfang Karl: Self-aware Memory: an adaptive memory management system for upcoming manycore architectures and its decentralized self-optimization process. In: Design Automation for Embedded Systems, Springer US, ISSN 0929-5585, Nov. 2014. [BibTeX]

Michael Bromberger, Fabian Nowak und Wolfgang Karl: Combined Hardware-Software Multi-Parallel Prefiltering on the Convey HC-1 for Fast Homology Detection. In: Journal of Parallel Computing, Elsevier, Oct. 2014.

Mario Kicherer, Fabian Nowak, Rainer Buchty, Wolfang Karl: Seamlessly portable applications: Managing the diversity of modern heterogeneous systems. In: ACM Transactions on Architecture and Code Optimization (TACO), Volume 8, Issue 4, pp. 42:1-42:20, Feb. 2012.

Rainer Buchty, Vincent Heuveline, Wolfgang Karl, Jan-Philipp Weiß: A Survey on Hardware-aware and Heterogeneous Computing on Multicore Processors and Accelerators. In: Concurrency and Computation: Practice and Experience, Journal, John Wiley & Sons, Ltd., ISSN 1532-0634, Sept. 2011. [BibTeX]

Frank Eichinger; David Kramer; Klemens Boehm; Wolfgang Karl: From Source Code to Runtime Behaviour: Software Metrics Help to Select the Computer Architecture. In: Knowledge-Based Systems, Volume 23, Issue 4, May 2010, pp. 343-349, Elsevier, May 2010. [BibTeX]

Rainer Buchty; Wolfgang Karl: Design Aspects for Self-Organizing Heterogeneous Multi-Core Architectures. In: it - Information Technology Journal, Issue "Computer Architecture - New Developments", Volume 5/08, October 2008, pp. 293-299, Oldenbourg Wissenschaftsverlag, Oct. 2008. [BibTeX]

Jie Tao; Marcel Kunze; Fabian Nowak; Rainer Buchty; Wolfgang Karl: Performance Advantage of Reconfigurable Cache Design on Multicore Processor Systems. In: International Journal of Parallel Programming, Volume 36, Number 3, June 2008, pp. 347-360, Springer Netherlands., April 2008. [BibTeX]

Tao, J.; Schulz, M.; Karl, W.: Simulation as a Tool for Optimizing Memory Accesses on NUMA Machines. In: Performance Evaluation, Vol 60, Nr. 1-4, pp. 31-50, May 2005. [BibTeX]

Brandes, T., et al.: Monitoring Cache Behavior on Parallel SMP Architectures and Related Programming Tools. In: Future Generation Computer Systems, Vol. 20, 2005. [BibTeX]


Conferences and Workshops